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Maxwell-Hiqe

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Lumiense Photonics, Inc. develops image sensor architectures and elements.  These enable the design of image sensors based on a stack of silicon wafers in which each photodiode sensing element has it own direct vertical connection through the stack.  The resulting highly parallel sensor architecture permits vertical separation between the sensing elements and the circuitry required for control and readout.  The bottom wafer is available to supply post-acquisition processing of image data.

The Lumiense Photonics Architecture

The basic LP Architecture is a stack of three wafers.  The top wafer contains only photodiodes that are made using high-performance scientific photodiode processes.  The second wafer contains the circuitry necessary to operate the photodiodes and read out the image signals.  These two wafers are thinned and their back surfaces are permanently bonded.  Using a special process, the photodiodes are then connected to the circuitry.  Before the wafers are bonded, one of them is supplied with a multilayer structure that acts as a reflector to send any light that penetrates the photodiodes back through for a second chance at detection.

The surface of the circuitry wafer is provided with bonding bumps so that is can be bonded to the third - mount - wafer.  The mount wafer is of normal thickness and can contain CMOS circuitry designed to perform any desired electronic function.  Connection to the package is made by ball bonds from the mount wafer.

A simplified version is also available that eliminates the circuitry wafer and connects the photodiodes directly to the mount wafer.  This shortens the design and fabrication where post-processing is not required.  Lumiense has licensed the Simplified LP Architecture to Imagica.

LP Architecture Advantages

 

 

 

 

Extensions

The LP Architecture, because it is composed of several separate wafers bonded together, is readily amenable to specialization in each of the wafers independently.  it is also readily extendable to a stack of more than three wafers.  This raises several possibilities, some of which are shown here.